Display device and manufacturing method for display device

ABSTRACT

A display device according to a present disclosure comprises: a first glass substrate including a through-hole; a wiring disposed in a first main surface of the first glass substrate; and a terminal formed in a second main surface of the first glass substrate and electrically connected to the wiring through the through-hole.

CROSS-REFERENCE TO RELATED APPLICATION

This application claims priority from Japanese application JP2018-036158, filed Mar. 1, 2018. This Japanese application isincorporated herein by reference.

BACKGROUND 1. Technical Field

The present disclosure relates to a display device and a method formanufacturing a display device.

2. Description of the Related Art

A conventional display device includes a thin film transistor substrateand a color filter substrate opposed to the thin film transistorsubstrate, and a driver mounting region where a driver is mounted isformed on a side opposed to the color filter substrate, namely, on amain surface on a display surface side in the thin film transistorsubstrate. The thin film transistor substrate is formed wider than thecolor filter substrate in planar view, and includes a portion thatoverlaps with the color filter substrate and a portion that does notoverlap with the color filter substrate. The driver mounting region isdisposed in the portion that does not overlap with the color filtersubstrate in planar view in the main surface on the display surface sideof the thin film transistor substrate (for example, see UnexaminedJapanese Patent Publication No. 2010-126398).

SUMMARY

In the conventional display device, there has been a problem in thatreduction of an area of a frame region around a display region, namely,a so-called narrow frame is provided. That is, in the conventionalconfiguration, it is necessary to provide the driver mounting region inthe main surface on the display surface side of the thin film transistorsubstrate, which results in the problem in that the narrow frame isprovided.

The present disclosure has been made in view of the above problem, andan object of the present disclosure is to provide the narrower frame ofthe display device.

A display device according to a present disclosure comprises: a firstglass substrate including a through-hole; a wiring disposed in a firstmain surface of the first glass substrate; and a terminal formed in asecond main surface of the first glass substrate and electricallyconnected to the wiring through the through-hole.

A method for manufacturing a display device according to a presentdisclosure comprises: a through-hole forming step of forming athrough-hole in a first glass substrate; a wiring forming step offorming a wiring on a first main surface of the first glass substrate;and a terminal forming step of forming a terminal electrically connectedto the wiring through the through-hole in the second main surface of thefirst glass substrate.

The display device according to the present disclosure can provide thenarrower frame of the display device.

BRIEF DESCRIPTION OF DRAWINGS

FIG. 1 is a schematic plan view illustrating a rear surface side ofdisplay device according to an exemplary embodiment.

FIG. 2 is a schematic sectional view illustrating a sectional structuretaken along line II-II in FIG. 1.

FIG. 3 is an equivalent circuit diagram illustrating a schematicconfiguration of the display region of display panel according to theexemplary embodiment.

FIG. 4 is a schematic plan view illustrating a configuration of pixelsof display panel according to the exemplary embodiment.

FIG. 5 is a sectional view taken along line C-C in FIG. 4.

FIG. 6 is a sectional view taken along line D-D in FIG. 4.

FIG. 7 is a schematic plan view illustrating the method formanufacturing a display device according to the exemplary embodiment.

FIG. 8 is a schematic sectional view illustrating the method formanufacturing a display device according to the exemplary embodiment.

FIG. 9 is a schematic plan view illustrating the method formanufacturing a display device according to the exemplary embodiment.

FIG. 10 is a schematic sectional view illustrating the method formanufacturing a display device according to the exemplary embodiment.

FIG. 11 is a schematic plan view illustrating the method formanufacturing a display device according to the exemplary embodiment.

FIG. 12 is a schematic sectional view illustrating the method formanufacturing a display device according to the exemplary embodiment.

FIG. 13 is a schematic sectional view illustrating the method formanufacturing a display device according to the exemplary embodiment.

FIG. 14 is a schematic sectional view illustrating the method formanufacturing a display device according to the exemplary embodiment.

FIG. 15 is a schematic sectional view illustrating the method formanufacturing a display device according to the exemplary embodiment.

FIG. 16 is a schematic plan view illustrating the method formanufacturing a display device according to the exemplary embodiment.

FIG. 17 is a sectional view taken along line A-A in FIG. 16.

FIG. 18 is a schematic sectional view illustrating the method formanufacturing a display device according to the exemplary embodiment.

FIG. 19 is a schematic sectional view illustrating the method formanufacturing a display device according to the exemplary embodiment.

FIG. 20 is a schematic sectional view illustrating the method formanufacturing a display device according to the exemplary embodiment.

FIG. 21 is a schematic sectional view illustrating the method formanufacturing a display device according to the exemplary embodiment.

DETAILED DESCRIPTION Exemplary Embodiment

An exemplary embodiment of the present disclosure will be describedbelow with reference to the drawings.

[Liquid Crystal Display Device]

A display device according to an exemplary embodiment of the presentdisclosure will be described below with reference to the drawings. Inthe exemplary embodiment, a liquid crystal display device will bedescribed as an example. However, the present disclosure is effective aslong as an active matrix is formed on a glass substrate in a displaydevice such as an organic electroluminescence display.

FIG. 1 is a schematic plan view illustrating a rear surface side ofdisplay device 1 of the exemplary embodiment, and FIG. 2 is a schematicsectional view illustrating a sectional structure taken along line II-IIin FIG. 1.

Display device 1 includes display panel 10, a driver (for example,source driver IC 20, gate driver IC 30), a control circuit (notillustrated), and a backlight device (not illustrated). Display panel 10includes thin film transistor substrate 100 including a thin filmtransistor array, counter substrate 200 opposed to thin film transistorsubstrate 100, and liquid crystal layer 300 disposed between thin filmtransistor substrate 100 and counter substrate 200. Seal member 310surrounding an outer periphery of liquid crystal layer 300 is disposedbetween a first main surface (display surface side) of thin filmtransistor substrate 100 and a second main surface (rear surface side)of counter substrate 200, and thin film transistor substrate 100 andcounter substrate 200 are bonded and fixed to each other by seal member310. Liquid crystal layer 300 is disposed while being surrounded by thinfilm transistor substrate 100, counter substrate 200, and seal member310, and the liquid crystal included in liquid crystal layer 300 issealed in an inner peripheral side of seal member 310.

Display panel 10 roughly includes a display region where an image isdisplayed and a non-display region (frame region) around the displayregion. In the conventional configuration, it is necessary to provide adriver mounting region where source driver IC 20 and gate driver IC 30as the driver is mounted in a region corresponding to the non-displayregion of thin film transistor substrate 100. On the other hand, indisplay device 1 of the exemplary embodiment, terminal 50 connected tothe driver is disposed on the rear surface side of thin film transistorsubstrate 100. For this reason, it is unnecessary to separately providethe driver mounting region that protrudes from counter substrate 200 inplanar view, and it is unnecessary to form thin film transistorsubstrate 100 larger than counter substrate 200. As a result, the frameof display device 1 can further be narrowed.

It is unnecessary to separately provide the driver mounting region thatprotrudes from counter substrate 200, so that thin film transistorsubstrate 100 and counter substrate 200 can be formed while beingoverlapped with each other in planar view even in an end side in whichterminal 50 connected to the driver is formed. That is, an outerperiphery of first glass substrate 101 included in thin film transistorsubstrate 100 and an outer periphery of second glass substrate 201included in counter substrate 200 overlap with each other in planarview. For this reason, it is unnecessary to form first glass substrate101 and second glass substrate 201 into different shapes, so thatimprovement of productivity can also be achieved.

Source driver IC 20 and gate driver IC 30 are directly mounted on firstglass substrate 101 disposed on the rear surface side of thin filmtransistor substrate 100. That is, COG (Chip On Glass) system displaydevice 1 is illustrated in FIG. 1. Source driver IC 20 and gate driverIC 30 are disposed along two different sides of display panel 10. In thepresent embodiment, two source driver ICs 20 and two gate driver ICs 30are illustrated, but the number of source driver ICs 20 and the numberof gate driver ICs 30 are not limited. Display device 1 of the presentdisclosure is not limited to the COG system, but may be FOG (Film OnGlass) system display device 1. In the exemplary embodiment, by way ofexample, source driver IC 20 and gate driver IC 30 are disposed alongtwo different sides of display panel 10. Alternatively, source driver IC20 and gate driver IC 30 may be disposed side by side along one side.

In the exemplary embodiment, as illustrated in FIG. 2, source line 11that is a wiring is formed on the first main surface (display surfaceside) of first glass substrate 101 included in thin film transistorsubstrate 100, and terminal 50 is formed on the second main surface(rear surface side). First glass substrate 101 includes through-hole 60.Source line 11 disposed in the first main surface (display surface side)of first glass substrate 101 and terminal 50 disposed in the second mainsurface (rear surface side) are electrically connected to each otherthrough through-hole 60. More specifically, terminal 50 formed in thesecond main surface is formed up to an inside of through-hole 60, andconnected to source line 11 in the first main surface (display surfaceside). With this configuration, terminal 50 connected to the driver (inthe example of FIGS. 1 and 2, source driver IC 20) can be disposed onthe rear surface side of thin film transistor substrate 100.

In the example of FIG. 2, source driver IC 20 disposed in the secondmain surface (rear surface side) of first glass substrate 101 and sourceline 11 disposed in the first main surface (display surface side) areelectrically connected to each other through through-hole 60. Similarly,gate driver IC 30 and the gate line in FIG. 1 are electrically connectedto each other through through-hole 60 provided in first glass substrate101.

In the exemplary embodiment, as illustrated in FIG. 2, conductor film 70is interposed between the first main surface (display surface side) offirst glass substrate 101 and source line 11. Conductor film 70 overlapswith through-hole 60 in planar view, and is electrically connected tosource line 11 and terminal 50. Conductor film 70 contains a materialhaving an ionization tendency lower than that of a material contained insource line 11. Although described later in detail in a method formanufacturing a display device, in the case of including an etching stepin forming through-hole 60, corrosion of source line 11 can be preventedin the etching step by interposing conductor film 70 made of thematerial having high etching resistance to an etching solution ascompared with source line 11.

Preferably, an outer edge of seal member 310 used to bond first glasssubstrate 101 and second glass substrate 201 is disposed on the outeredge side of first glass substrate 101 with respect to through-hole 60in planar view. With this configuration, in the etching step, theetching solution can be prevented from invading between first glasssubstrate 101 and second glass substrate 201 to corrode a connectionportion between terminal 50 and source line 11 and conductor film 70.

In the exemplary embodiment, as illustrated in FIG. 2, conductive film80 is disposed on the rear surface side of terminal 50, and sourcedriver IC 20 is also disposed on the rear surface side of terminal 50.For example, conductive film 80 is an anisotropic conductive film. Aconductive film in which conductive fine particles such as nickel andgold are dispersed in an insulating adhesive film can be used asconductive film 80. By pressing source driver IC 20 from the rearsurface side of conductive film 80, the anisotropic conductive film ispressurized and the conductive fine particles contained in the adhesivefilm electrically connect source driver IC 20 and terminal 50.

When source driver IC 20 is pressed from the rear surface side ofconductive film 80, stress is generated not only in conductive film 80but also in first glass substrate 101. For this reason, as illustratedin FIG. 2, seal member 310 desirably overlaps with conductive film 80 inplanar view. With this configuration, the stress applied to first glasssubstrate 101 can be absorbed by seal member 310, and first glasssubstrate 101 can be prevented from cracking.

Desirably, conductive film 80 does not overlap with through-hole 60 inplanar view. There is a possibility that mechanical strength of theregion where through-hole 60 is formed is weakened as compared withother regions. Consequently, when conductive film 80 and through-hole 60are disposed so as not to overlap with each other in planar view, thestress generated in pressing source driver IC 20 can be prevented frombeing directly applied to the region where through-hole 60 is formed intransmitting the stress to first glass substrate 101 through conductivefilm 80, so that first glass substrate 101 can be prevented fromcracking.

Desirably, seal member 310 overlaps with through-hole 60 in planar view.As described above, the region where through-hole 60 is formed has themechanical strength lower than that of other regions. However, by makingseal member 310 overlap with through-hole 60 in planar view, the stressapplied to the region where through-hole 60 is formed can be absorbed byseal member 310 that overlaps with through-hole 60 in planar view. As aresult, first glass substrate 101 can be prevented from cracking.

FIG. 3 is an equivalent circuit diagram illustrating a schematicconfiguration of the display region of display panel 10. A plurality ofsource lines 11 extending in a first direction (for example, a rowdirection) and a plurality of gate lines 12 extending in a seconddirection (for example, a column direction) are provided in displaypanel 10. Thin film transistor (TFT) 13 is provided in an intersectionof each source line 11 and each gate line 12. Each source line 11 iselectrically connected to corresponding source driver IC 20 (see FIG.1), and each gate line 12 is electrically connected to correspondinggate driver IC 30 (see FIG. 1).

In display panel 10, a plurality of pixels 14 are arranged into a matrixshape (the row direction and the column direction) corresponding to theintersections of source lines 11 and gate lines 12. A plurality of pixelelectrodes 15 disposed in each pixel 14 and common electrode 16 commonto the plurality of pixels 14 are provided in thin film transistorsubstrate 100.

A data signal (data voltage) is supplied from corresponding sourcedriver IC 20 to each source line 11. A gate signal (gate-on voltage,gate-off voltage) is supplied from corresponding gate driver IC 30 toeach gate line 12. Common voltage Vcom is supplied from a common driver(not illustrated) to common electrode 16 through common line 17. When anon voltage (gate-on voltage) of the gate signal is supplied to gate line12, TFT 13 connected to gate line 12 is turned on, and the data voltageis supplied to pixel electrode 15 through source line 11 connected toTFT 13. An electric field is generated by a difference between the datavoltage supplied to pixel electrode 15 and common voltage Vcom suppliedto common electrode 16. Liquid crystal is driven by the electric fieldto control transmittance of light emitted from the backlight, therebydisplaying an image. For performing color display, a desired datavoltage is supplied to source line 11 connected to pixel electrode 15 ofpixel 14 corresponding to each of red, green, and blue, which are formedby a stripe color filter.

FIG. 4 is a plan view illustrating a specific configuration of pixels 14of display panel 10. FIG. 5 is a sectional view taken along line C-C inFIG. 4, and FIG. 6 is a sectional view taken along line D-D in FIG. 4.The specific configuration of pixel 14 will be described with referenceto FIGS. 4 to 6.

In FIG. 4, a region that is partitioned by two adjacent source lines 11and two adjacent gate lines 12 in planar view of display panel 10corresponds to one pixel 14. TFT 13 is provided in each pixel 14. TFT 13includes semiconductor layer 21 formed on insulating film 102 (see FIGS.5 and 6) and drain electrode 22 and source electrode 23 that are formedon semiconductor layer 21. Drain electrode 22 is electrically connectedto source line 11, and source electrode 23 is electrically connected topixel electrode 15 through through-hole 24.

Pixel electrode 15 made of a transparent conductive material such asindium tin oxide (ITO) is formed in each pixel 14. Pixel electrode 15includes a plurality of openings (slits), and is formed into a stripeshape. There is no limitation on a shape of the opening. One commonelectrode 16 made of the transparent conductive film such as ITO isformed in common to each pixel 14 over a display region. An opening(corresponding to a dotted-line enclosure in FIG. 4) is formed in aregion where common electrode 16 overlaps with through-hole 24 andsource electrode 23 of TFT 13 in order to electrically connect pixelelectrode 15 and source electrode 23.

As illustrated in FIGS. 5 and 6, display panel 10 includes thin filmtransistor substrate 100, counter substrate 200, and liquid crystallayer 300 sandwiched between thin film transistor substrate 100 andcounter substrate 200.

In thin film transistor substrate 100, gate line 12 (see FIG. 5) isformed on glass substrate 101, and insulating film 102 is formed so asto cover gate line 12. Source line 11 (see FIG. 6) is formed oninsulating film 102, and insulating film 103 is formed so as to coversource line 11. Common electrode 16 is formed on insulating film 103,and insulating film 104 is formed so as to cover common electrode 16.Pixel electrode 15 is formed on insulating film 104, and alignment film105 is formed so as to cover pixel electrode 15. Polarizing plate 106 isprovided on the rear surface side of glass substrate 101.

In counter substrate 200, color filter layer 220 including black matrix203 and colored portion 202 (for example, a red portion, a greenportion, and a blue portion) is formed on glass substrate 201, andovercoat layer 204 is formed so as to cover black matrix 203 and coloredportion 202. Alignment film 205 is formed on overcoat layer 204.Conductive layer 206 is provided on the surface (front surface) of glasssubstrate 201 on the display surface side (the side opposite to theliquid crystal layer 300 side), and polarizing plate 207 is provided onthe surface (front surface) of conductive layer 206 on the displaysurface side (the side opposite to the liquid crystal layer 300 side).

Liquid crystal 301 is enclosed in liquid crystal layer 300. Liquidcrystal 301 may be negative type liquid crystal having negativedielectric anisotropy or positive type liquid crystal having positivedielectric anisotropy. Alignment films 105, 205 may be an alignment filmsubjected to rubbing alignment treatment, or an optical alignment filmsubjected to optical alignment treatment.

[Method for Manufacturing Display Device]

A method for manufacturing display device 1 of the present disclosurewill be described below. The method for manufacturing display device 1of the present disclosure includes wiring forming step S2, through-holeforming step S4, and terminal forming step S6. In the exemplaryembodiment, the method for manufacturing display device 1 furtherincludes conductor film forming step S1, bonding step S3, segmentationstep S5, and pressure bonding step S7.

FIGS. 7, 9, and 11 are schematic plan views illustrating the method formanufacturing a display device of the exemplary embodiment, andillustrating the rear surface side of the second glass substrate. FIGS.8, 10, and 12 to 19 are schematic sectional views illustrating themethod for manufacturing a display device of the exemplary embodiment,and illustrating a section corresponding to line II-II in FIG. 1.

In the exemplary embodiment, conductor film forming step S1 isperformed. In conductor film forming step S1, as illustrated in FIGS. 7and 8, conductor film 70 is formed in the first main surface (displaysurface side) of first glass substrate 101. Desirably, a material, suchas gold and platinum, which has an ionization tendency lower than thatof source line 11 or gate line 12, is used as a material constitutingconductor film 70.

Subsequently, wiring forming step S2 is performed. In wiring formingstep S2, as illustrated in FIGS. 9 and 10, the wiring is formed in thefirst main surface (display surface side) of first glass substrate 101.The wiring includes source line 11 and gate line 12, and source line 11is electrically connected to conductor film 70 in FIG. 9. Source line 11and gate line 12 are electrically connected to pixel electrode 15through TFT 13.

Then, bonding step S3 is performed. In bonding step S3, as illustratedin FIGS. 11 and 12, first glass substrate 101 and second glass substrate201 are bonded together using seal member 310. Desirably, countersubstrate 200 including second glass substrate 201 is prepared inadvance of bonding step S3. As illustrated in FIG. 12, insulating film103 may be interposed between seal member 310 and first glass substrate101, and color filter layer 220 and overcoat layer 204 may be interposedbetween seal member 310 and second glass substrate 201.

In bonding step S3, seal member 310 is disposed such that position 60Awhere through-hole 60 is formed in through-hole forming step S4 (to bedescribed later) and seal member 310 overlap with each other in planarview. At least a part of the outer edge of seal member 310 is disposedso as to be located on the outer edge side of first glass substrate 101with respect to position 60A where through-hole 60 is formed in planarview.

A liquid crystal layer forming step of forming liquid crystal layer 300may be further included before or after bonding step S3. As a firstexample, after seal member 310 is formed on the display surface side ofthin film transistor substrate 100 in bonding step S3, liquid crystal isdropped on an inner peripheral side of seal member 310, thin filmtransistor substrate 100 and counter substrate 200 are bonded together(S3), and seal member 310 is cured by irradiation of an ultraviolet ray.In a second example, after seal member 310 is formed on the rear surfaceside of counter substrate 200, liquid crystals are dropped on the innerperipheral side of seal member 310, thin film transistor substrate 100and counter substrate 200 are bonded together (S3), and seal member 310is cured by the irradiation of the ultraviolet ray. As a third example,thin film transistor substrate 100 and counter substrate 200 are bondedtogether (S3), and the liquid crystal is injected into the regionsurrounded by seal member 310. Thus, the order of performing the liquidcrystal layer forming step and the bonding step S3 is not considered.

Subsequently, through-hole forming step S4 is performed. In theexemplary embodiment, through-hole forming step S4 includes a laserirradiation step and a wet etching step. In the laser irradiation step,as illustrated in FIG. 13, first glass substrate 101 is irradiated witha laser beam to form modified region 60B. In the wet etching process,first glass substrate 101 is immersed in an acid or alkaline etchingsolution. Modified region 60B formed by the irradiation of the laserbeam has an etching rate faster than that of other portions. For thisreason, modified region 60B is etched deeper than other portions by theetching solution, and through-hole 60 is formed as illustrated in FIG.14. In the wet etching step, first glass substrate 101 cansimultaneously be thinned.

In the exemplary embodiment, as illustrated in FIG. 14, in through-holeforming step S4, through-hole 60 is formed so as to overlap withconductor film 70 in planar view. As described above in conductor filmforming step S1, the material, such as gold and platinum, which has theionization tendency lower than that of copper or aluminum that is mainlycontained in source line 11 or gate line 12, is used as the materialconstituting conductor film 70. For this reason, conductor film 70 hashigh etching resistance to an etching solution, such as hydrofluoricacid, sulfuric acid, and nitric acid, which is used in the wet etchingstep, as compared with source line 11 and gate line 12. Thus, whenthrough-hole 60 is formed so as to overlap with conductor film 70 inplanar view, source line 11 and gate line 12 can be prevented from beingcorroded by the etching solution.

As described above, in bonding step S3, seal member 310 is disposed soas to overlap with position 60A (see FIG. 12) where through-hole 60 isformed in planar view. For this reason, in through-hole forming step S4,through-hole 60 is formed so as to overlap with seal member 310 inplanar view.

As described above, in bonding step S3, seal member 310 is disposed suchthat at least a part of the outer edge of seal member 310 is located onthe outer edge side of first glass substrate 101 with respect toposition 60A (see FIG. 12) where through-hole 60 is formed in planarview. For this reason, in through-hole forming step S4, at least thepart of the outer edge of seal member 310 is disposed on the outer edgeside with respect to through-hole 60. As a result, in the wet etchingstep, the etching solution can be prevented from invading between firstglass substrate 101 and second glass substrate 201 to corrode aconnection portion between terminal 50 and source line 11 and conductorfilm 70.

In the exemplary embodiment, through-hole forming step S4 includes thelaser irradiation step and the wet etching step. Alternatively, asillustrated in FIG. 15, on the rear surface side of first glasssubstrate 101, resist 90 may be formed by photolithography whileavoiding position 60A where through-hole 60 is formed, the wet etchingmay be performed to form through-hole 60, and resist 90 may be peeledoff. However, in the case where thin film transistor substrate 100 is alarge-size substrate including a plurality of display panel regions, itis necessary to have a thickness ensuring the mechanical strength enoughto withstand the stress during conveyance up to segmentation step S5 (tobe described later). For this reason, sometimes a step of thinning firstglass substrate 101 is provided in order to thin display device 1 aftersegmentation step S5. As to the demand for the thinning, whenthrough-hole forming step S4 includes the laser irradiation step and thewet etching step, first glass substrate 101 can simultaneously bethinned in the wet etching step, so that desirably the productivity ishigh.

When through-hole forming step S4 includes the laser irradiation stepand the wet etching step, segmentation step S5 and through-hole formingstep S4 can be performed in the same step.

That is, as illustrated in FIGS. 16 and 17, segmentation step S5includes a step of irradiating large-size thin film transistor substrate100 and counter substrate 200 with the laser beam along outer edge CL ofthe plurality of display panel regions and a step of immersing thin filmtransistor substrate 100 and counter substrate 200 in the etchingsolution to perform the wet etching along the plurality of display panelregions. Thus, in the laser irradiation step (the laser irradiationalong outer edge CL in FIGS. 16 and 17) in segmentation step S5 and thelaser irradiation step (the laser irradiation along position 60A wherethe through-holes is formed in FIGS. 16 and 17) in through-hole formingstep S4 are performed in the same step, and the wet etching step insegmentation step S5 and the wet etching step in through-hole formingstep S4 are performed in the same step, which allows the improvement ofthe productivity.

In segmentation step S5, thin film transistor substrate 100 and countersubstrate 200 can be formed into the same shape. That is, also on theend side in which terminal 50 is formed, the end sides of first glasssubstrate 101 and second glass substrate 201 can be formed such thatfirst glass substrate 101 and second glass substrate 201 overlap witheach other in planar view. As a result, it is unnecessary to form thetwo glass substrates into different shapes, and production efficiencycan further be improved.

Subsequently, terminal forming step S6 is performed. In terminal formingstep S6, as illustrated in FIG. 18, underlying conductive film 50A isformed on the second main surface (rear surface side) of first glasssubstrate 101 in which through-hole 60 is formed. For example,sputtering or electroless plating method can be used as a method forforming underlying conductive film 50A. Underlying conductive film 50Ais formed not only on the rear surface side of first glass substrate 101but also on the inner surface of through-hole 60 and a part of conductorfilm 70 exposed from through-hole 60.

As illustrated in FIG. 19, resist 90 is formed by photolithography whileavoiding the position where terminal 50 is formed. As illustrated inFIG. 20, electric field plating is performed while electricity issupplied to underlying conductive film 50A, which allows the formationof terminal 50. In this way, terminal 50 electrically connected to thewiring such as source line 11 through through-hole 60 can be formed inthe second main surface (rear surface side) of first glass substrate101. In the exemplary embodiment, terminal 50 is electrically connectedto the wiring such as source line 11 through conductor film 70.

Resist 90 is removed using acetone after terminal 50 is formed. Then, aportion in which the rear surface side of underlying conductive film 50Ais not covered with terminal 50 is removed by the wet etching.

In the example of FIG. 19, resist 90 is formed while avoiding theposition where terminal 50 is formed. Alternatively, as illustrated inFIG. 21, resist 90 may be formed at the position where terminal 50 isformed. After resist 90 is formed at the position where terminal 50 isformed, the portion in which the rear surface side of underlyingconductive film 50A is not covered with resist 90 is removed by the wetetching. Then, by removing resist 90 using acetone, remaining underlyingconductive film 50A may be used as terminal 50.

Pressure bonding step S7 is performed after terminal forming step S6. Inpressure bonding step S7, as illustrated in FIG. 2, conductive film 80is pressure-bonded from the rear surface side to terminal 50 on thesecond main surface (rear surface side) of first glass substrate 101.For example, conductive film 80 is an anisotropic conductive film. Aconductive film in which conductive fine particles such as nickel andgold are dispersed in an insulating adhesive film can be used asconductive film 80. By pressing source driver IC 20 from the rearsurface side of conductive film 80, the anisotropic conductive film ispressurized and the conductive fine particles contained in the adhesivefilm electrically connect source driver IC 20 and terminal 50.

When source driver IC 20 is pressed from the rear surface side ofconductive film 80, stress is generated not only in conductive film 80but also in first glass substrate 101. For this reason, as illustratedin FIG. 2, conductive film 80 is desirably pressure-bonded to terminal50 at the position overlapping with seal member 310 in planar view. Bythis method, the stress applied to first glass substrate 101 can beabsorbed by seal member 310, and first glass substrate 101 can beprevented from cracking.

In pressure bonding step S7, conductive film 80 is desirablypressure-bonded to terminal 50 at the position that does not overlapwith through-hole 60 in planar view. There is a possibility thatmechanical strength of the region where through-hole 60 is formed isweakened as compared with other regions. Consequently, when conductivefilm 80 is press-bonded while avoiding the region where through-hole 60is formed, the stress generated in pressure bonding step S7 can beprevented from being directly applied to the region where through-hole60 is formed in transmitting the stress to first glass substrate 101through conductive film 80. As a result, first glass substrate 101 canbe prevented from cracking.

As described above in bonding step S3 and through-hole forming step S4,in the exemplary embodiment, through-hole 60 is formed so as to overlapwith seal member 310 in planar view. For this reason, in pressurebonding step S7, the region where through-hole 60 in which themechanical strength is weaker than that of other regions is formedoverlaps with seal member 310 in planar view. As a result, the stressapplied to the region where through-hole 60 is formed can be absorbed byseal member 310. As a result, first glass substrate 101 can be preventedfrom cracking.

However, as described in the exemplary embodiment, there is an advantagethat the position where through-hole 60 is formed can easily becontrolled by performing conductor film forming step S1 beforethrough-hole forming step S4. That is, in the case where the laserirradiation step is performed in through-hole forming step S4 (see FIG.13), through-hole 60 can be formed at an appropriate position byirradiating conductor film 70 formed in conductor film forming step S1with the laser beam as a mark. In the case where resist 90 is formed byphotolithography in through-hole forming step S4 (see FIG. 15), resist90 can be formed using conductor film 70 formed in the conductor filmforming step as a mark, and through-hole 60 can be formed at anappropriate position.

In the above, the specific embodiments of the present application havebeen described, but the present application is not limited to theabove-mentioned embodiments, and various modifications may be made asappropriate without departing from the spirit of the presentapplication.

What is claimed is:
 1. A display device comprising: a first glasssubstrate including a through-hole; a wiring disposed in a first mainsurface of the first glass substrate; a terminal formed in a second mainsurface of the first glass substrate and electrically connected to thewiring through the through-hole; a second glass substrate disposedcloser to a display surface side than the first glass substrate anddisposed to be opposed to the first main surface of the first glasssubstrate; and a seal member bonding the first glass substrate and thesecond glass substrate together, wherein the seal member and thethrough-hole overlap with each other in planar view.
 2. The displaydevice according to claim 1, further comprising: a conductor filminterposed between the first main surface of the first glass substrateand the wiring, overlapping the through-hole in planar view, andelectrically connected to the wiring and the terminal, wherein theconductor film contains a material having an ionization tendency lowerthan that of a material contained in the wiring.
 3. The display deviceaccording to claim 1, further comprising: a second glass substratedisposed closer to a display surface side than the first glass substrateand disposed to be opposed to the first main surface of the first glasssubstrate, wherein an outer periphery of the first glass substrate inwhich the terminal is disposed and an outer periphery of the secondglass substrate overlap with each other in planar view.
 4. The displaydevice according to claim 1, further comprising: a second glasssubstrate disposed closer to a display surface side than the first glasssubstrate and disposed to be opposed to the first main surface of thefirst glass substrate; and a seal member bonding the first glasssubstrate and the second glass substrate together, wherein at least apart of an outer edge of the seal member is disposed on an outer edgeside of the first glass substrate with respect to the through-hole inplanar view.
 5. The display device according to claim 1, furthercomprising: a second glass substrate disposed closer to a displaysurface side than the first glass substrate and disposed to be opposedto the first main surface of the first glass substrate; a seal memberbonding the first glass substrate and the second glass substratetogether; and a conductive film electrically connected to the terminalon the second main surface side of the first glass substrate, whereinthe conductive film and the seal member overlap with each other inplanar view.
 6. The display device according to claim 1, furthercomprising: a conductive film electrically connected to the terminal onthe second main surface side of the first glass substrate, wherein thethrough-hole and the conductive film do not overlap with each other inplanar view.
 7. A display device comprising: a first glass substrateincluding a through-hole; a wiring disposed in a first main surface ofthe first glass substrate; a terminal formed in a second main surface ofthe first glass substrate and electrically connected to the wiringthrough the through-hole; and a conductor film interposed between thefirst main surface of the first glass substrate and the wiring,overlapping the through-hole in planar view, and electrically connectedto the wiring and the terminal, wherein the conductor film contains amaterial having an ionization tendency lower than that of a materialcontained in the wiring.